1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and particularly to a semiconductor device which has a structure to avoid damages or the like of metal bumps due to differential thermal expansion and a method of manufacturing the same.
2. Description of the Related Art
In recent semiconductor devices, high integration of semiconductor chips to be contained in these semiconductor devices have brought effects of miniaturizing and thinning the semiconductor devices themselves, and higher performance and higher operating speed of electronic equipment have been promoted. Further, in order to satisfy requirements of enhancing the performance, reducing the size and weight and increasing the operating speed in electronic equipment to be contained in semiconductor devices, new types of packages have been developed. For example, a package based on FCBGA (flip chip ball grid array) system in which highly densely packing can be performed has appeared in the market.
FIGS. 10A to 10D are side views showing a semiconductor device based on the FCBGA system. FIG. 10A shows a semiconductor chip, and FIG. 10B shows the mount state of the semiconductor chip. A semiconductor chip 40 has a plurality of electrode pads which are disposed in a predetermined arrangement on the peripheral portion thereof or on an active region, and metal bumps 41 are mounted on the respective electrode pads (FIG. 10A). At the final user side, the semiconductor chip 40 is mounted on a multi-layered wiring board (mount board) 42 having electrodes which are arranged in the same pattern as the bump arrangement pattern (FIG. 10B).
In general, when metal bumps 41 are formed of solder balls, the solder balls are reflowed under a predetermined temperature and fixed to the multi-layered board 42. At this time, stress and strain occurs due to differential thermal expansion (the difference of coefficients of thermal expansion) between the semiconductor chip 40 and the multi-layered wiring board 42, and thus the mount reliability is lost. In order to solve this problem, the following countermeasure is taken.
For example, aluminum nitride (AlN), mullite, ceramic materials such as glass ceramics, etc., which are expensive in price, may be used as materials of the multi-layered wiring board 42. With these materials, the coefficient of linear expansion of the multi-layered wiring board 42 is approached to that of silicon which mainly constitutes the semiconductor chip 40, whereby the mismatch of the coefficients of linear expansion is minimized to enhance the mounting reliability. This countermeasure is effective from the viewpoint of the enhancement of the mounting reliability. However, the materials of the multi-layered wiring board 42 are expensive in price, and thus the use thereof is limited to an expensive apparatus such as a super computer, a large-scale computer or the like.
In view of the foregoing situation, there has been developed such a technique that a multi-layered board using an organic material which is relatively low in price and has a large coefficient of linear expansion is used for device mounting, and an under fill resin is inserted between the multi-layered wiring board and a semiconductor chip to disperse shearing stress acting on bump connection portions, thereby reducing the stress and strain and enhancing the mounting reliability.
In the technique using the organic materials as described above, a cheap multi-layered wiring board can be used. However, when voids exist in the under fill resin or when the adhesion at the interface between the under fill resin and the semiconductor chip or the interface between the under fill resin and the multi-layered wiring board is degraded, an interface exfoliating phenomenon is induced in the reflow step, resulting in production of failed products.
The FCBGA type packages are generally used for large scale semiconductor integrated circuits (LSI) having high performance, however, the products are expensive. Therefore, when failed components other than semiconductor chips are detected in an electrically screening step after the semiconductor chips are mounted, the semiconductor chips are removed from the multi-layered wiring board and re-used. This semiconductor chip removing step needs a work of heating a good-quality semiconductor chip 40 which is sucked from the back side by a suction heating tool 43 as shown in FIG. 10C, pulling up the semiconductor chip 40 while melting the bump joint portions thereof and removing the semiconductor chip 40 from the multi-layered wiring board 42.
At the time when the semiconductor chip 40 is removed, a metal bump 41 is damaged as shown in FIG. 10D, however, the chip body itself is not damaged. In the case of a semiconductor device designed so that the under fill resin is interposed between the semiconductor chip 40 and the multi-layered wiring board 42, not only the metal bump 41 is damaged, but also the peripheral devices containing the multi-layered wiring board 42 and a passivation film for protecting the active region of the semiconductor chip are damaged. In this case, the recycling of the semiconductor chip 40 is substantially impossible. Therefore, even when a cheap multi-layered wiring board formed of organic material is used, the cost is not necessarily lowered.
The present invention has been implemented in view of the foregoing situation, and has an object to provide a semiconductor device and a method of manufacturing the same in which deforming stress acting on a metal bump is moderated with no under fill resin between a semiconductor chip and a multi-layered wiring board (mounting board) to thereby enhance the mounting reliability of the semiconductor chip, and also peripheral devices containing the mounting board, etc. are avoided from being damaged in a recycling step, thereby reducing the manufacturing cost.
In order to attain the above object, according to a first aspect of the present invention, a semiconductor device in which electrode pads formed on a semiconductor chip is connected to corresponding electrodes on a mounting board through metal bumps, is characterized by including: a passivation film which is formed in the semiconductor chip and has opening portions through which the electrode pads are exposed; first conductive members whose one end faces are connected to the electrode pads through the opening portions; second conductive members through which the other end faces of the first conductive members and the metal bumps are connected to one another; and an insulating resin layer having elasticity which covers the first conductive members, the second conductive members and the passivation film with the exception of the end faces of the second conductive members.
In the semiconductor device of the present invention, irrespective of no provision of under fill resin between the semiconductor chip and the mounting board, deforming stress acting on the metal bumps can be effectively absorbed/relaxed by the first conductive members and the second conductive members connected thereto both embedded in the elastic insulating resin layer, thereby enhancing the mounting reliability. Further, damages imposed on the peripheral devices containing the mounting board, etc. in the recycling step can be avoided, and semiconductor chips can be recycled when cheap mounting boards formed of organic materials are used, so that the manufacturing cost can be lowered.
Here, the metal bumps may be formed of solder added with metal materials containing Ag. With these materials, the coefficient of expansion of the metal bumps is adjusted to further improve the stress relaxation and thus further enhance the mounting reliability of the semiconductor device.
Further, it is preferable that each of the second conductive members is designed in a multi-stage structure having plural stages which are different in coefficient of thermal expansion from one another. In this case, the stress occurring between the semiconductor chip and the mounting board can be stepwise relaxed, and the mounting reliability is further enhanced.
Still further, it is preferable that each of the second conductive members is designed in a multi-stage structure having plural stages and the insulating resin layer is also designed in a multi-layer structure, the respective stages of each of the second conductive member being covered by the respective layers of the insulating resin layer. In this case, the multi-layered structure of protection film can be obtained by the plural insulating resin layers, so that the passivation film on the semiconductor chip and the active region surface below the passivation film can be protected from heat and mechanical stress occurring in the recycling step. Therefore, a semiconductor device which can be easily recycled can be achieved. Further, since each of the second conductive members is designed in the multi-stage arrangement, structures which are high in height can be obtained as external terminals. Therefore, when the semiconductor device of the present invention is mounted on the mounting board at the final user side, the standoff height between the mounting board and the semiconductor chip can be set to a high value, so that an excellent stress relaxation effect can be achieved.
Specifically, the insulating resin layer covering the second conductive members at the first stage which are brought into contact with the other end faces of the first conductive members may be formed of material mainly containing epoxy resin, silicone resin, polyimide resin, polyolefine resin, cyanate ester resin, phenol resin, naphthalene resin or fluorene resin. Further, the insulating resin layer covering the second conductive members at the second and higher stages subsequent to the first stage may be formed of an insulating stress-relaxing resin mainly containing epoxy resin, silicone resin, polyimide resin, polyolefine resin, cyanate ester resin, phenol resin, naphthalene resin or fluorene resin. With these materials, an insulating resin layer which can excellently absorb the deforming stress acting on the metal bumps.
A heat spreader may be fixed to the opposite surface to the electrode-pad forming surface of the semiconductor chip through heat dissipating adhesive agent. In this case, the thermal characteristic of the semiconductor device can be enhanced.
Specifically, the heat spreader may be formed of metal material containing Cu, Al, W, Mo, Fe, Ni or Cr as a main component, or ceramic material containing alumina, AlN, SiC, BN or mullite.
Further, the heat dissipating adhesive agent may be formed of material mainly containing epoxy resin, silicone resin, polyimide resin, polyolefine resin, cyanate ester resin, phenol resin, naphthalene resin or fluorene resin, or material containing Ag, Pd, Cu, Al, Au, Mo, W, diamond, alumina, AlN, mullite, BN or SiC.
According to a second aspect of the present invention, a method of manufacturing a semiconductor device in which electrode pads exposed from a passivation film formed in a semiconductor chip are connected to corresponding electrodes of a mounting board through metal bumps, is characterized by comprising the steps of: forming on the surface of a metal plate a resist film which is subjected to a patterning treatment for preparing a pattern corresponding to the pattern of the electrode pads of the semiconductor chip; selectively etching the metal plate with the resist film used as a mask to achieve a temporary board having plural metal posts projecting from the bottom portion thereof; connecting first conductive members formed on the electrode pads to the metal posts of the temporary board; disposing an insulating resin layer having elasticity between the semiconductor chip and the temporary board; removing the bottom portion of the temporary board to convert the metal posts into second conductive members whose end faces are exposed from the insulating resin layer; and mounting the metal bumps on the exposed end faces of the second conductive members.
According to the semiconductor device manufacturing method of the present invention, there is provided a semiconductor device in which, irrespective of no provision of the under fill resin between the semiconductor chip and the mounting board, deforming stress acting on the metal bumps can be effectively absorbed/relaxed by the first conductive members and the second conductive members connected thereto both embedded in the elastic insulating resin layer, so that the mounting reliability can be enhanced.
Here, the metal plate may be formed of a clad metal plate in which a first metal layer and a second metal layer are joined to each other, and by the selective etching treatment, the first metal layer may be converted into the metal posts while the second metal layer is converted into the bottom portion of the temporary board. In this case, the plural metal posts can be easily obtained by preparing one clad metal plate.
It is preferable that the metal plate is formed of a clad metal plate in which first and second metal layers which are mutually different in coefficient of thermal expansion are joined to a base metal layer, and by the selective etching treatment, the first metal layer and the second metal layer are converted into the metal posts while the base metal layer is converted into the bottom portion. In this case, since the first and second metal layers to be converted into the metal posts are mutually different in coefficient of thermal expansion from each other, the stress occurring between the semiconductor chip and the mounting board can be stepwise relaxed, and the mounting reliability can be further enhanced.
Specifically, the first metal layer may be formed of Cu, Ni or the alloy material of Cu and Ni. In this case, solder wettability of the metal posts completed can be made excellent, so that the connection work of the metal posts with the first conductive members is easily performed.
It is preferable that the second conductive members are designed in a multi-stage structure having plural stages and the insulating resin layer is also designed in a multi-layer structure, the respective stages of the second conductive members being covered by the respective layers of the insulating resin layer. In this case, the multi-layered structure of the protection film can be obtained by the plural insulating resin layers, so that the passivation film on the semiconductor chip and the active region surface below the passivation film can be protected from heat and mechanical stress occurring in the recycling step. Therefore, a semiconductor device which can be easily recycled can be achieved. Further, the second conductive members are designed in the multi-stage arrangement, whereby structures which are high in height can be obtained as external terminals. Therefore, when the semiconductor device of the present invention is mounted on the mounting board at the final user side, the standoff height between the mounting board and the semiconductor chip can be set to a high value, so that an excellent stress relaxing effect can be achieved.
Further, it is preferable that after the first conductive members of plural semiconductor chips are connected to the metal posts in the step of connecting the first conductive members to the metal posts, the respective semiconductor chips covered by the insulating resin layer may be separated from one another before the step of mounting the metal bumps onto the exposed end faces of the second conductive members.
In this case, after plural semiconductor chips formed on a wafer-like semiconductor substrate are connected to corresponding metal posts at the same time, an insulating resin layer may be coated over the whole surface of the workpiece, and then the manufacturing process for each semiconductor chip is progressed. Therefore, individual semiconductor chips can be shipped under the state that any metal bumps are not mounted thereon. Accordingly, the number of steps can be more greatly reduced and the manufacturing cost can be further reduced as compared with the packaging method of manufacturing semiconductor chips while the respective semiconductor chips are separated from one another in advance. In addition, when a semiconductor device is mounted on a multi-layered board, the metal bumps serving as external terminal electrodes can be suitably mounted at the user side, so that semiconductor devices having higher degree of freedom for users can be achieved.
Further, prior to the step of mounting metal bumps onto the exposed end faces of the second conductive members, it is preferable to form metal thin-film electrodes on the exposed end faces by an electroless Ni/Au plating treatment or an electroless Au plating treatment. In this case, when the semiconductor device is mounted on the mounting board, the processing of forming the external terminal electrodes at the user side can be easily performed.
It is also preferable to use the metal plate comprising one plate member and to form the metal posts and the bottom portion on the one plate member by a half etching treatment or press work. In this case, the temporary board can be easily formed by using one metal plate member and thus the metal posts can be achieved in relatively low cost.
According to a third aspect of the present invention, a method of manufacturing a semiconductor device in which electrode pads exposed from a passivation film formed in a semiconductor chip are connected to corresponding electrodes of a mounting board through metal bumps, is characterized by comprising the steps of: forming on the surface of a metal plate a resist film which is subjected to a patterning treatment for preparing a pattern corresponding to the pattern of the electrode pads of the semiconductor chip; conducting a plating treatment on the metal plate after the formation of the resist film to form plural metal posts on the metal plate, thereby forming a temporary board; connecting first conductive members formed on the electrode pads of the semiconductor chip to the metal posts of the temporary board; disposing an insulating resin having elasticity between the semiconductor chip and the temporary board; removing the metal plate of the temporary board to convert the metal posts into second conductive members whose end faces are exposed from the insulating resin; and mounting the metal bumps on the exposed end faces of the second conductive members.
In the semiconductor device manufacturing method of the present invention, the same effect as the method of the second aspect of the present invention can be achieved. In addition, since the metal posts are formed on the surface of the beforehand-prepared metal plate by plating, a relatively thin sheet-like metal member may be used as the metal plate, and thus the work of removing the metal plate can be extremely easily performed. Further, a well-known plating technique may be applied to the step of forming the metal posts, so that the cost can be further reduced.
It is preferable that the second conductive members are designed in a multi-stage structure and the respective stages are different in coefficient of thermal expansion. In this case, the stress occurring between the semiconductor chip and the mounting board can be stepwise relaxed, and the mounting reliability can be further enhanced.
It is also preferable that the metal plate comprises plural metal layers. In this case, the metal layer serving as a lower layer is formed of material which can be removed by etching, and an upper layer is formed of material which cannot be removed by the etching treatment for the metal layer serving as the lower layer. Accordingly, after the metal layer serving as the lower layer is removed by etching, the remaining metal layer of the upper layer is removed by a polishing work to obtain the metal posts. Therefore, this is effective to a case where the metal posts of the same material as the lower layer of the metal plate are formed on the metal plate by plating.